TMR2PCSSEL=00, TMR0PCSSEL=00, DMADONESEL=00, VREFBUFINSEL=0, TMR0SCSEL=0, AFECLKSEL=00, UART3IRSEL=0, TMR0PLLSEL=0, TMR3PCSSEL=00, TMR1SCSEL=0, VREFBUFPD=0, VREFBUFOUTEN=0, AFECLKPADDIR=0, PDBADCTRG=0, EWMINSEL=0, OSCON=0, UARTMODTYPE=0, UART1IRSEL=0, UART2IRSEL=0, TMR2SCSEL=0, UART0IRSEL=0, TMR3SCSEL=0, RTCCLKSEL=0, TMR1PCSSEL=00
Miscellaneous Control Register
| OSCON | RTC oscillator status 0 (0): RTC oscillator is disabled. 1 (1): RTC oscillator is enabled. |
| PDBADCTRG | PDB bypass XBAR as ADC trigger 0 (0): XBAR to trigger ADC 1 (1): PDB output to trigger ADC |
| DMADONESEL | DMA Done select 0 (00): DMA0 1 (01): DMA1 2 (10): DMA2 3 (11): DMA3 |
| AFECLKSEL | AFE Clock Source Select (SIMAFECLK selection) 0 (00): MCG PLL Clock selected 1 (01): MCG FLL Clock selected 2 (10): OSC Clock selected 3 (11): Disabled |
| AFECLKPADDIR | AFE Clock Pad Direction 0 (0): AFE CLK PAD is input 1 (1): AFE CLK PAD is output |
| UARTMODTYPE | UART Modulation Type 0 (0): TypeA (OR’ed) Modulation selected for IrDA 1 (1): TypeB (AND’ed) Modulation selected for IrDA |
| UART0IRSEL | UART0 IrDA Select 0 (0): Pad RX input (PTD[0], PTF[3] or PTK[3], as selected in Pinmux control) selected for RX input of UART0 and UART0 TX signal is not used for modulation 1 (1): UART0 selected for IrDA modulation. UART0 TX modulated by XBAR_OUT[14] and UART0 RX input connected to XBAR_OUT[13]. UARTxIRSEL cannot configure XBAR_OUT[14] and XBAR_OUT[13] automatically, and they need extra configuration in XBAR. User should configure XBAR[14:13] accordingly. |
| UART1IRSEL | UART1 IrDA Select 0 (0): Pad RX input (PTD[2], PTI[0] or PTK[5], as selected in Pinmux control) selected for RX input of UART1 and UART1 TX signal is not used for modulation 1 (1): UART1 selected for IrDA modulation. UART1 TX modulated by XBAR_OUT[14] and UART1 RX input connected to XBAR_OUT[13].UARTxIRSEL cannot configure XBAR_OUT[14] and XBAR_OUT[13] automatically, and they need extra configuration in XBAR. User should configure XBAR[14:13] accordingly. |
| UART2IRSEL | UART2 IrDA Select 0 (0): Pad RX input PTI[6] or PTE[6] selected for RX input of UART2 and UART2 TX signal is not used for modulation 1 (1): UART2 selected for IrDA modulation. UART2 TX modulated by XBAR_OUT[14] and UART2 RX input connected to XBAR_OUT[13].UARTxIRSEL cannot configure XBAR_OUT[14] and XBAR_OUT[13] automatically, and they need extra configuration in XBAR. User should configure XBAR[14:13] accordingly. |
| UART3IRSEL | UART3 IrDA Select 0 (0): Pad RX input (PTC[3] or PTD[7], as selected in Pinmux control) selected for RX input of UART3 and UART3 TX signal is not used for modulation 1 (1): UART3 selected for IrDA modulation. UART3 TX modulated by XBAR_OUT[14] and UART3 RX input connected to XBAR_OUT[13]. UARTxIRSEL cannot configure XBAR_OUT[14] and XBAR_OUT[13] automatically, and they need extra configuration in XBAR. User should configure XBAR[14:13] accordingly. |
| EWMINSEL | External Watchdog Monitor Input Select 0 (0): Input from PAD (PTL[3], PTE[2] or PTE[3] as selected from Pinmux control ) 1 (1): Peripheral Crossbar (XBAR) Output[32] |
| TMR0PLLSEL | Timer CH0 PLL clock Select 0 (0): Selects Bus Clock as source for the Timer CH0 1 (1): Selects the PLL_AFE clock as the source for Timer CH0. The PLL_AFE clock source is itself selected using the MISC_CTL[5:4] |
| TMR0SCSEL | Quadtimer Channel0 Secondary Count source Select 0 (0): Pad PTF1 or PTD5, depending upon PCTL configuration. 1 (1): Peripheral Crossbar (XBAR) Output[5] |
| TMR1SCSEL | Quadtimer Channel1 Secondary Count source Select 0 (0): Pad PTG0 or PTC6, depending upon PCTL configuration. 1 (1): Peripheral Crossbar (XBAR) Output[6] |
| TMR2SCSEL | Quadtimer Channel2 Secondary Count source Select 0 (0): Pad PTF7 or PTF0, depending upon PCTL configuration. 1 (1): Peripheral Crossbar (XBAR) Output[7] |
| TMR3SCSEL | Quadtimer Channel3 Secondary Count source Select 0 (0): Pad PTE5 or PTD1, depending upon PCTL configuration. 1 (1): Peripheral Crossbar (XBAR) Output[8] |
| TMR0PCSSEL | Quadtimer Channel0 Primary Count Source Select 0 (00): Bus Clock 1 (01): Peripheral Crossbar Output [9] 2 (10): Peripheral Crossbar Output [10] 3 (11): Disabled |
| TMR1PCSSEL | Quadtimer Channel1 Primary Count Source Select 0 (00): Bus Clock 1 (01): Peripheral Crossbar Output [9] 2 (10): Peripheral Crossbar Output [10] 3 (11): Disabled |
| TMR2PCSSEL | Quadtimer Channel2 Primary Count Source Select 0 (00): Bus Clock 1 (01): Peripheral Crossbar Output [9] 2 (10): Peripheral Crossbar Output [10] 3 (11): Disabled |
| TMR3PCSSEL | Quadtimer Channel3 Primary Count Source Select 0 (00): Bus Clock 1 (01): Peripheral Crossbar Output [9] 2 (10): Peripheral Crossbar Output [10] 3 (11): Disabled |
| RTCCLKSEL | RTC Clock select 0 (0): RTC OSC_32K clock selected 1 (1): MCGIRCLK selected |
| VREFBUFOUTEN | VrefBuffer Output Enable 0 (0): Buffer does not drive PAD 1 (1): Buffer drives selected voltage (selected by vref_buffer_sel) on pad |
| VREFBUFINSEL | VrefBuffer Input Select 0 (0): Internal Reference selected as Buffer Input 1 (1): External Reference selected as Buffer Input |
| VREFBUFPD | VrefBuffer Power Down 0 (0): Buffer Enabled 1 (1): Buffer Powered Down |